DLC Communication UNDER CONSTRUCTION BY HONDAINFO

1. Physical Layer (Theoretical informations based on ISO 9141 - CARB Road Vehicles Diagnostic Systems standard)

Signal and Communication Specifications

Honda specifies different logic levels for the Receiver and Transmitter.

Receiver Logic Levels:

Logic “0” <= 0.3 * VBAT

0.7 * VBAT >= Logic “1”

Transmitter Logic Levels:

Logic “0” <= 0.2 * VBAT

0.8 * VBAT >= Logic “1”

A logic bit transition must be less than 10% of the total bit time. The transition time is measured between the 80% and 20% battery points. Bit time is defined as the time between the 50% battery points of consecutive rising and falling levels.

Physical Layer

CTE = Tester and Cables capacitance COBW = On-Board Wiring capacitance CECU = Sum of all ECU Input Capacitance where CECU + COBW is less or equal to 7.6 nF and CTE is less or equal to 2 nF. The capacitance of the DLC data line with respect to GND can be no greater than 500 pF.

2. Data Link Layer (Communication)

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3. Application layer

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